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Topics
Getting started with vhdl
Digital hardware design using VHDL in a nutshell
D-Flip-Flops (DFF) and latches
Protected types
Wait
Comments
Memories
Resolution functions, unresolved and resolved types
Identifiers
Recursivity
Examples
Installation or Setup
Synchronous counter
Hello world
Block diagram
Coding
John Cooley’s design contest
D-Flip-Flops (DFF)
Latches
Clock edge detection
A simulation environment for the synchronous counter
Signals vs. variables, a brief overview of the simulation semantics of VHDL
A pseudo-random generator
Eternal wait
Sensitivity lists and wait statements
Wait until condition
Single line comments
Delimited comments
Nested comments
Shift register
Two processes driving the same signal of type `bit`
Resolution functions
A one-bit communication protocol
Basic identifiers
Extended identifiers
Computing the Hamming weight of a vector
Renaud Pacalet
StackOverflow Profile
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